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The
third task was to develop a custom designed circuit
board and then port the GPS Architect software
to it. The board is shown in fi gure 4, it has
an Altera CycloneII FPGA device and a Zarlink
2015 RF frontend. For IO there is an Ethernet
port, two RS232 serial ports and a JTAG programming
/ debugging port. There is sram and flash memory
as well as a confi guration controller and serial
fl ash. There are expansion headers, a real time
clock, a three axis accelerometer, leds, switches
and sma connectors.
The board was designed for very low noise to keep
interference with the sensitive RF front end down.
It can be seen in fi gure 5 that the IF output
of the 2015 RF chip is free from interference
spikes. |
Fig 3. Tracking Channel |
Fig 4. The 410 GPS development board |
A single channel baseband processor has been built
on this board to test the correlation functions
and tune the tracking loops. Correlation peaks
have been obtained from signals injected from
a Spirent GPS simulator. Figure 6 shows a correlation
plot, on the xaxis is the code delay (in half-chips)
over two carrier doppler bins, and on the y-axis
is the correlation power.
Shortly, we will fi nish working on the tracking
loops and then the GPS Architect is pretty much
ready to run on the custom GNSS board. There
will be a debugging and testing stage over the
next few months, followed by the publishing of
our results. We also have an improved baseband
processor written in Verilog ready to replace
the VHDL version.
The infl exibility of the RF front end was eluded
to earlier in this article. The custom board has
only an L1 (1575MHz) front end. Due to passband
fi ltering and available chips, it is diffi cult
to make a front end that covers more bands. Our
solution was to provide a header and some sma
|
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clock connectors
to allow a daughter board to be attached later
for access to other signals. Daughter boards can
be built to suite the Galileo and new GPS signals
once the RF chips are available. |
| Further Development |
Due to
the confi gurable nature of FPGA’s, there
are many possibilities for research using this
platform including:
• Baseband signal processing design: improved
tracking in weak signal and multi-path
environments.
• Investigating new signals.
• DSP search engine: for signal acquisition
and tracking, particularly for weak
signals.
• Develop the GPS Architect software for
better performance or specifi c functionality.
• Replace the GPS Architect.
• Raw data collection and packaging for
PC based soft receiver processing.
• Signal interference (jamming) detection.
• Ultra-tight INS integration. |
| Conclusion |
| The project
is heading towards completion. We have the FPGA
GNSS circuit board running a single channel baseband
processor, tracking a GPS satellite. We have the
GPS Architect software ready to run on the NiosII
processor. We hope to complete testing and report
our results in early 2006. We hope that our work
will then be of value to the GNSS research community. |
| |
FCC (2004)
Wireless Enhanced
911 Rules (E911), US Federal
Communications Commission (FCC),
http:// www.fcc.gov/911/enhanced/
WAAS (2004) Wide Area
Augmentation System (WAAS),
US Federal Aviation Administration
(FAA), http://gps.faa.gov/
Programs/WAAS/waas.htm
Altera (2004) Stratix Device -
- Product Brief, Altera Inc.,
http://www.altera.com/products/
devices/dev-index.jsp
EGNOS (2004) European
Geostationary Navigation Overlay
System (EGNOS), European Space
Agency (ESA), http://esamultimedia.
esa.int/docs/egnos/estb/egnos_pro.htm
SBAS (2004) Satellite Base
Augmentation System (SBAS),
Eurocontrol SBAS Project, http://
www.eurocontrol.fr/projects/sbas/
GLONASS (2004) GLONASS
Satellite Navigation System, Russian
Federation Ministry of Defense,
http://www.glonass-center.ru
Canalys (2004) EMEA mobile GPS
navigation market races ahead,
GPS market analysis, http://www.
canalys.com/pr/2004/r2004093.htm
Galileo (2004) Galileo, European
Space Agency (ESA), http://www.
esa.int/esaNA/galileo.html
Petrovski I (2003) QZSS - Japan’s
New Integrated Communication
and Positioning Service for Mobile
Users, GPSWorld, 14(6):24-29
Zarlink (2001) GP2021 GPS
12-Channel Correlator, Zarlink
Semiconductor Inc. http://
www.zarlink.com/product_
profi les/gp2021.htm |
| January 2006 |
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Peter
Mumford Research
Assistant, School of Surveying and
Spatial Information Systems, University
of New South Wales, Sydney Australia.
p.mumford@unsw.edu.au
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Kevin Parkinson
Design Engineer,
Currently completing a Master of
Engineering degree at the University of
New South Wales with the Satellite Navigation
and Positioning Group.
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Frank Engel Senior
Engineer, Philips
Semiconductors
Dresden, Germany
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